SystemC's often thought of as a hardware description language like VHDL and Verilog, but's more aptly described as a system description language, since it exhibits its real power during Electronic system level Design (ESL), transaction-level modeling, behavioral modeling, and High Level Synthesis. SystemC's a set of library routines and macros implemented in C++, which makes it possible to simulate concurrent processes, each described by ordinary C++ syntax. Instantiated in the SystemC framework… (More on Systemc)